Thanks to the modern integration technologies, it is possible to integrate micro-devices, such as electronic circuits, micro-mechanical structures and/or optical structures, in a die obtained from a semiconductor material (e.g., silicon) wafer. Particularly, the silicon wafer is subjected to a series of selective lithographic processes, at the end of which a plurality of replicas of the desired integrated devices are formed on the semiconductor wafer. At this point, the processed wafer is subjected to dicing operations, in order to obtain the desired dies; at the end of the dicing operations, each resulting die includes a corresponding integrated circuit. Typically, the dies are then encapsulated into respective packages, whose characteristics depend on the use the devices are destined to.
If the devices integrated in the dies are defective or subjected to faults during the operation, and the dies are returned to the manufacturer in order to carry out a fault analysis, it may be important to be capable of retrieving the original position of the device within the semiconductor wafer (i.e., before the dicing operations for obtaining the dies), since such information may allow one to manage the quality of the manufacturing process in an optimum way. Indeed, the performances, the reliability and different functional parameters (such as electric and/or optic parameters) of the devices integrated in each die may vary with the position of the device itself within the semiconductor wafer, for example because the crystallographic quality of the wafer material may vary with the position within the wafer. As a consequence, by means of analysis of such type, the manufacturer is capable of planning proper strategies for improving the manufacturing quality of the dies and the quality of the circuits integrated therein.
For this purpose, each die is provided with an indication—in jargon, “die index”—of the zone wherein such die was positioned within the semiconductor wafer before being subjected to the dicing operations.
At the present time, different indexing methods which exploit “visible” die indexes are known in the art, i.e., visible marks located on each die—for example on a top passivation layer in the stack of material layers of the wafer—during the manufacturing process. In this way, it may be possible to read a die index through a non-invasive inspection even when the electronic device integrated in the die is defective. For example, a die index formed by a number of an ordered sequence of numbers may be assigned to each die obtained from the wafer; such number may be placed in a peripheral portion of the die.
A process for manufacturing the dies starting from a semiconductor wafer typically comprises a sequence of stages. Photolithographic masks are typically employed during such process stages for defining shapes in the various layers of material forming the wafer. A photolithographic mask—briefly, mask—is a plate including very high definition photographic images (comprising opaque and transparent areas) of shapes and structures useful for implementing the device on the various material layers of the wafer.
In certain predetermined process stages, the wafer is covered with a photosensitive material layer, in jargon denoted “photosensitive resist” or “photoresist”, and a mask properly aligned with the wafer is enlightened by means an optical system with radiation having wavelengths which are suitable for the exposure of the photoresist. Consequently, the images on the mask are projected and transferred on the photoresist covering the wafer. The exposed photoresist is then developed, generating on the wafer shapes that allow to identify the areas of material to be removed and those to be maintained.
The manufacturing process previously described may be carried out using a traditional projection system, in which the wafer is positioned and aligned with the required masks for the manufacturing of the devices on the wafer. As long as the size of wafer is relatively small, each mask includes a number of images equal to the number of dies to be obtained from the wafer, and the whole wafer is exposed to the lighting through such mask in a single step.
By means of such projection system it is possible to index the dies with a visible index, particularly forming the die indexes of all the dies obtainable from the wafer on one among the masks used during the manufacturing process.
The increasing in size of the semiconductor wafers has resulted in the introduction of step-by-step projection systems (in jargon, “wafer steppers”), by means of which the images of the mask required for the production of the devices are not projected in a single step, but instead are projected on the wafer in different consecutive steps.
A step-by-step projection system includes the optical system and an alignment system for aligning the optical system, the mask and the wafer in a step-by-step fashion. Particularly, the image projected by the mask typically covers an area that is a portion of the whole area of the wafer (in jargon, such portion is often referred to as “shot”). After each exposition, the wafer positioned under the optical system is shifted by an amount exactly equal to the size of the projection of the mask on the wafer.
The step-by-step projection systems allow obtaining a higher number of dies, starting from semiconductor wafers larger than the wafers used with the traditional projection systems. Thus, the masks used for the traditional projection systems are not compatible with the size of the semiconductor wafers that can be processed by means of the use of the step-by-step projection systems; consequently, using step-by-step projection systems it may not be possible to project the images of the visible indexes of all the dies of the wafer in at the same time (i.e., in a single step).
European Patent Application EP 1589578, which is incorporated by reference, describes a method for generating visible dies indexes adapted to be employed in the step-by-step projection systems. Briefly, on each die a pair of die indexes is generated, including a first index adapted to identify the position of the die within the wafer, and a second index adapted to identify the position assumed by the mask with respect to the wafer surface during the step in which the wafer portion including the die has been exposed. Such indexes may be implemented using a particular material layer formed on the semiconductor wafer during the preceding phases of the process, for example one among the metallic layers. For example, in one of the embodiments described in the patent application EP 1589578, the first index comprises a reference element and two further index elements whose positions relative to the reference element determine a pair of coordinates which identify the position of the die within the mask. The second index comprises instead a toothed reference structure in which each possible combination of pairs of teeth of the structure is associated with a particular position of the mask in the semiconductor wafer. Selectively etching a pair of teeth of the toothed reference structure, it is thus possible to register the position assumed by the mask with respect to the wafer surface during the step in which the portion of the wafer including the die has been exposed. In this way, by means of such two indexes results, it is possible to univocally retrieve the exact position of the die in the wafer before the dicing operations.
However, a solution of such type, and generally any solution making use of visible die indexes, may not be advantageous under all applications
Indeed, since the majority of the dies are sold encapsulated in a respective package, in order to read a visible index it is necessary to open the package, with the risk of further damaging the die. Moreover, once the packaging has been opened, or even using infrared or x-ray sensing systems, distinguishing the structures forming the die indexes from the rest of the components forming the circuit integrated in the die may not be a simple operation, because of the very small size and the very large number of electronic devices which are actually integrated in a single die. A further drawback linked to the use of visible die indexes, which is correlated with the previously cited drawback, regards the costs—in terms of time, too—required for carrying out inspection operations of such type, which may be very high; particularly, a visual inspection of such type, other than requesting sometimes the opening of the packaging, is hardly executable in an automated way, often requiring instead the use of an expert operator, who knows the topology of the integrated device.
Alternative indexing methods provide instead the integration of die indexes formed by non-volatile memory elements—for example, flash memory cells—in each die, adapted to store the information regarding the coordinates of the die in the semiconductor wafer. For example, during a test phase of the circuit integrated in the die, in the memory elements of the die, indexes of each die are stored as a numeric string corresponding to the coordinates of the die.
However, even the solutions of such type may increase the costs, and particularly the costs of the manufacturing process of the dies. Indeed, in order to integrate memory cells in the die, it may be necessary to carry out expensive dedicated process steps, and occupy active portions within the die. In addition, a solution of such type may make the die even more to faults; in case the faults are such to completely impair the circuit integrated in the chip, the information stored in the memory elements is lost.